Rosa M. Badia holds a PhD on Computer Science (1994) from the Technical University of Catalonia (UPC). She is the manager of the Workflows and Distributed Computing research group at the Barcelona Supercomputing Center (BSC). Her current research interest are programming models for complex platforms (from edge, fog, to Clouds and large HPC systems). The group led by Dr. Badia has been developing StarSs programming model for more than 10 years, with a high success in adoption by application developers. Currently the group focuses its efforts in PyCOMPSs/COMPSs, an instance of the programming model for distributed computing including Cloud. Dr Badia has published near 200 papers in international conferences and journals in the topics of her research. Her group is very active in projects funded by the European Commission and in contracts with industry. Dr Badia is the PI of the eFlows4HPC project.
Luca Benini holds the chair of digital Circuits and systems at ETHZ and is Full Professor at the Universita di Bologna. He received a PhD from Stanford University. He has been visiting professor at Stanford University, IMEC, EPFL. He served as chief architect in STmicroelectronics France. Dr. Benini's research interests are in energy-efficient parallel computing systems, smart sensing micro-systems and machine learning hardware. He has published more than 1000 peer-reviewed papers and five books (h-index 110). He is an ERC-advanced grant winner, a Fellow of the IEEE, of the ACM and a member of the Academia Europaea. He is the recipient of the 2016 IEEE CAS Mac Van Valkenburg award, the EDAA Achievement and the ACM/IEEE A. Richard Newton awards in 2020.
Roger Ferrer is a Research Engineer at the Barcelona Supercomputing Center who works on compilers. His interests are compilers, programming models, parallelism and HPC. He has worked in the compiler side of the OpenMP tasking model and is now involed in the EPI and EUPILOT projects where he is working on compilation using the RISC-V Vector Extension using the LLVM infrastructure.
Charlotte Frenkel received the M.Sc. degree (summa cum laude) in Electromechanical Engineering and the Ph.D. degree in Engineering Science from Université catholique de Louvain (UCLouvain), Louvain-la-Neuve, Belgium, in 2015 and 2020, respectively. In February 2020, she joined the Institute of Neuroinformatics, UZH and ETH Zürich, Switzerland, as a postdoctoral researcher. She is an incoming Assistant Professor at Delft University of Technology, The Netherlands, as of July 2022. She received a best paper award at the IEEE ISCAS 2020 conference and the FNRS Nokia Bell Labs Scientific Award, the FNRS IBM Innovation Award and the UCLouvain/ICTEAM Best Thesis Award for her Ph.D. thesis. She serves as a TPC member for the tinyML Research Symposium, IEEE ESSCIRC, and IEEE ISLPED since 2022, and as a member of the neuromorphic systems and architecture technical committee of the IEEE CAS society since 2021. She presented several invited talks, including two keynotes at the tinyML EMEA Technical Forum 2021 and at the Neuro-Inspired Computational Elements (NICE) neuromorphic conference 2021.
Mario Kovač is full professor at the Faculty of Electrical Engineering and Computing (FER), University of Zagreb, Croatia and Director of HPC Architectures and Applications Research Center at FER. He received his PhD in computer science and engineering from the same university in 1995. He was awarded Fulbright scholar award for Computer Science and Engineering Research that he spent at the University of South Florida, Tampa, USA between 1990 and 1994. His special focus was on efficient chip implementation of architectures for image, video and math computation processing that led to several chips including Jaguar chip. He holds several US and international patents in multimedia and architecture domains. His work on architectures and efficient execution was focused over time in several industry domains: multimedia systems, large national/cross-national health-care systems, electric cars and other. In 2008, Croatian President awarded him with the Medal of Honor "Order of Danica Hrvatska with the image of Ruđer Bošković" for special merit in science. His professional activities throughout years were always intertwined combination of science and industry activities. He was President/Vice-president of the Board and CxO of several organisations and companies where he was primarily involved in strategic management and R&D.
Prof. Jesús Labarta received his Ph.D. in Telecommunications Engineering from UPC in 1983, where he has been a full professor of Computer Architecture since 1990. He was Director of European Center of Parallelism at Barcelona from 1996 to the creation of BSC in 2005, where he is the Director of the Computer Sciences Dept. His research team has developed performance analysis and prediction tools and pioneering research on how to increase the intelligence embedded in these performance tools. He has also led the development of OmpSs and influenced the task based extension in the OpenMP standard. He has led the BSC cooperation with many IT companies. He is now responsible of the POP center of excellence providing performance assessments to parallel code developers throughout the EU and leads the RISC-V vector accelerator within the EPI project. He has pioneered the use of Artificial Intelligence in performance tools and will promote their use in POP, as well as the AI-centric co-designing of architectures and runtime systems. He was awarded the 2017 Ken Kennedy Award for his seminal contributions to programming models and performance analysis tools for high performance computing, being the First Non US Researcher receiving it.
Ruth Lennon is the director of Craobh Technology Consulting providing personalised solutions to industry problems. Ruth is a Lecturer has 20 years of experience as a lecturer in the Department of Computing in Letterkenny Institute of Technology, Ireland. Ruth research interests focus on enterprise scale systems with particular focus on DevOps and Cloud technologies. She has been a member of many technical panels and committees including NSAI/TC 2/SC 11 on cloud and distributed systems, NSAI/TC 2/SC 2 on Software Engineering and ISO/IEC JTC 1/AG 3 "Open Source Software". Ruth is a member of the working group developing the P2675 DevOps standard. Ruth’s goal in DevOps is to ensure that security and performance are seen as core to development projects just as it is in configuration projects. Ruth has worked on security projects in the area of applying DevOps to support Data Science. In addition, Ruth is a member of the ACM, ACM-W, IEEE, IEEE-WIE and the IEEE Computer Society. Ruth is the Chair of the ACM-W Europe.
Josep Lluís Berral received his Engineering degree in Informatics (2007), M.Sc. in Computer Architecture (2008), and Ph.D. in Computer Science (2013) at BarcelonaTech-UPC. He works in High-Performance Data-Analytics on data-center and cloud environments at the Barcelona Supercomputing Center (BSC), at the “Data-Centric Computing” group. He is currently collaborating in projects with IBM and Petrobras, and previously with Microsoft, Databricks, Intel and Cisco. He did research at the High-Performance Computing group and at the Relational Algorithms, Complexity and Learning group at BarcelonaTech-UPC. Also he has been at the DarkLab group at Rutgers University (Piscataway, NJ) as a Visitor Scholar in 2012, also in IBM Watson Labs (Yorktown, NY) in 2019. He was awarded with a Juan de la Cierva research fellowship from the Spanish Ministry of Economy in 2016. He is an IEEE and ACM member.
Mauro Olivieri received the Master (Laurea) degree in electronics engineering and the Doctorate degree in electronics and computer engineering from the University of Genoa, Italy, where he was assistant professor from 1995 to 1998. In 1998 he joined Sapienza University of Rome as associate professor, teaching Digital Electronics and Digital Integrated System Architectures. His research interests are digital system-on-chip design, microprocessor core design and digital nano-scale circuits. He was the scientific responsible for Sapienza University for 2 FP7 ENIAC JU European projects, 1 FP7 IAPP European project, 4 PRIN/FIRB national projects, 11 MIUR University Projects, and 8 industrial research contracts. He was a technical expert for the Italian Economic Development Ministry in the “Smart Specialization Strategy” project on the topic “Smart Cities/Communities”. He is an evaluator for the European Commission in the ECSEL Joint Undertaking. He is a visiting researcher at the Barcelona Supercomputing Center within the European Processor Initiative project. He authored over 120 papers and a textbook in three volumes on digital VLSI design. He has been a TPC member of IEEE DATE and was General Co-Chair of IEEE/ACM ISLPED’15. He is a senior member of the IEEE.
Per Stenstrom is professor at Chalmers University of Technology. His research interests are in parallel computer architecture. He has authored or co-authored four textbooks, about 200 publications and twenty patents in this area. He has been program chairman of several top-tier IEEE and ACM conferences including IEEE/ACM Symposium on Computer Architecture and acts as Associate Editor of ACM TACO, Topical Editor IEEE Transaction on Computers and Associate Editor-in-Chief of JPDC. He is a Fellow of the ACM and the IEEE and a member of Academia Europaea, the Royal Swedish Academy of Engineering Sciences and the Royal Spanish Academy of Engineering Science.
Valerie Taylor is the Director of the Mathematics and Computer Science Division and Argonne Distinguished Fellow at Argonne National Laboratory. Prior to joining Argonne, she was the Senior Associate Dean of Academic Affairs in the College of Engineering and a Regents Professor and the Royce E. Wisenbaker Professor in the Department of Computer Science and Engineering at Texas A&M University. In 2003, she joined Texas A&M University as the Department Head of CSE, where she remained in that position until 2011. Prior to joining Texas A&M, Valerie Taylor was a member of the faculty in the EECS Department at Northwestern University for eleven years. Her research is in the area of high-performance computing, with a focus on performance analysis and modeling of parallel, scientific applications. She is also the Executive Director of the Center for Minorities and People with Disabilities in IT (CMD-IT). Valerie Taylor is an IEEE Fellow and ACM Fellow.
Carme Torras (www.iri.upc.edu/people/torras) is Research Professor at the Institut de Robòtica i Informàtica Industrial (CSIC-UPC) in Barcelona, where she heads a research group on assistive and collaborative robotics. She received M.Sc. degrees in Mathematics and Computer Science from the University of Barcelona and the University of Massachusetts, respectively, and a Ph.D. degree in Computer Science from the Technical University of Catalonia (UPC). She has supervised 19 PhD theses and led 16 European projects, the latest being her ERC Advanced Grant project CLOTHILDE – Cloth manipulation learning from demonstrations. She is IEEE and EurAI Fellow, member of Academia Europaea and, in 2020, she received both the Catalan National Research Award and the Spanish National Research Award in Mathematics and Information Technologies. Prof. Torras is also a fiction writer. Her short stories and novels, written originally in Catalan and translated to several languages, often address ethical dilemmas raised by robotics, AI and social media. Her novel La mutació sentimental - winner of the Pedrolo and Ictineu awards - has been translated into English with the title The Vestigial Heart (MIT Press, 2018) and published together with online materials to teach a course on “Ethics in Social Robotics and AI”, which is being imparted at several universities worldwide.
I’m a Professor at the Universitat Politècnica de Catalunya UPC Barcelona Tech and, Research Manager of the research group “Emerging Technologies for Artificial Intelligence” at Barcelona Supercomputing Center. Throughout my career, I have applied High-Performance Computing knowledge to areas like Cloud Computing or Big Data. My current research focuses on Supercomputing applied to Artificial Intelligence. I have taught academic subjects in all these areas, wrote scientific publications, advised doctoral theses and, participated in R&D projects with companies and institutions. I’m also a writer of technical books, and in the past, I collaborated actively with different mass media and gave lectures in various forums. More detail can be found in my web site https://torres.ai
Director of the Barcelona Supercomputing Center. His research focuses on high performance architectures. He has published approximately 700 papers, has served in the organization of more than 300 International Conferences and he has given more than 500 invited talks. Prof. Valero has been honored with several awards, among them the 3 most relevant awards in Computer Architecture field: the Eckert-Mauchly Award 2007 by the IEEE and ACM; Seymour Cray Award 2015 by IEEE; Charles Babbage 2017 by IEEE; Harry Goode Award 2009 by IEEE:; the Spanish National awards “Julio Rey Pastor” and “Leonardo Torres Quevedo”. ""Hall of the Fame"" member of the ICT European Program (selected as one of the 25 most influents European researchers in IT during the period 1983-2008. Lyon,November 2008); In 2020 he has been awarded for his exceptional leadership in HPC by “HPCWire Reader’s Choice Awards” for “being an HPC pioneer since 1990 and the driving force behind the renaissance of European HPC independence”. Honored with “Condecoración de la Orden Mexicana del Águila Azteca” 2018, highest recognition granted by the Mexican Government. He is Honorary Doctorate by 9 Universities. He is member of 9 academies. He is a fellow of IEEE and ACM and he is also Intel Distinguished Research Fellow. In 1998 he won a “Favourite Son” Award of his home town, Alfamén (Zaragoza) and in 2006, his native town of Alfamén named their Public College after him.
Uri Weiser is a Professor emeritus at the Electrical and Computing Engineering (ECE) department, the Technion IIT and is involved in numerous startups. He received his bachelor and master degrees in EE from the Technion and Ph.D in CS from the University of Utah, Salt Lake City. Professor Weiser worked at Intel corporation from 1988-2006. At Intel, Weiser initiated the definition of the first Pentium® processor, drove the definition of Intel's MMX™ technology, with his student invented the Trace Cache, co-managed the founding Intel Microprocessor Design Center at Austin, Texas and formed an Advanced Media applications research activity. Weiser was appointed an Intel Fellow in 1996. In 2002 he became an IEEE Fellow and in 2005 an ACM Fellow, while in 2016 he was awarded the prestigious Eckert Mauchly award. Prior to his career at Intel, Professor Weiser worked for the Israeli Department of Defense as a research and system engineer and later with National Semiconductor Design Center in Israel, where he led the design of the NS32532 microprocessor.
Josephine Wood is Senior Programme Officer at the European High Performance Computing Joint Undertaking (EuroHPC-JU). She joined the JU in September 2020 where she is responsible for strategy coordination in the JU’s HPC R&D and procurement activities. She supports the Executive Director in managing the JU. She is an expert in EU policy-making and has worked in shaping European digital policy for over 10 years focussing on regulation in digital and telecoms policy, R&D and digital infrastructures and digital skills in the Commission. She has also worked on health, energy and climate change policy in the European Parliament. Prior to that she worked in the pharmaceutical industry for other 10 years. She is a fluent French speaker and holds Irish and Belgian passports.